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[OS Develop] FIFO

Description: 关于操作系统:先进先出调度算法（FIFO）处理缺页中断-On the operating system: FIFO scheduling algorithms (FIFO) handling page fault
Platform: | Size: 22528 | Author: 王伟(就是刚才的 hgy | Hits:

[VHDL-FPGA-Verilog] fifo的vhdl原代码

Description: 本文为verilog的源代码-In this paper, the source code for Verilog
Platform: | Size: 22528 | Author: 艾霞 | Hits:

[Windows Develop] fifo源程序

Description: fifo源程序，VHDL编写~具有一定的参考价值~-source code of a fifo, writen in VHDL, will be useful to some extent as a reference
Platform: | Size: 1024 | Author: 许 | Hits:

[VHDL-FPGA-Verilog] VHDL.fifo

Description: 在网上找到的通用存储器vhdl代码库，觉得挺好用的。-the Internet to find the common memory vhdl code library, feeling very good use.
Platform: | Size: 1178624 | Author: 黎莉 | Hits:

[VHDL-FPGA-Verilog] syn_fifo

Description: 同步FIFO的verilog编码 -synchronous FIFO verilog coding synchronous FIFO verilog Synchronous Code FI FOR the verilog coding synchronous FIFO verilog coding
Platform: | Size: 1024 | Author: | Hits:

[OS program] fifo

Description: 计算机操作系统中的页面置换算法源程序，包括fifo，lru，opt等，用vc编写-computer operating system replacement pages algorithm source code, including fifo, lru, opt. prepared using vc
Platform: | Size: 44032 | Author: 孤鸿影 | Hits:

[Communication-Mobile] fifo

Description: 一个FIFO的原代码 非常有用 给大家共享了 下吧-A FIFO of the original code is very useful to the U.S. to share the next bar
Platform: | Size: 1024 | Author: wang | Hits:

[Other Embeded program] fifo-ram

Description: 采用Verilog语言描述的FIFO和双端口RAM源代码。-Verilog language used to describe the FIFO and dual-port RAM source code.
Platform: | Size: 1024 | Author: 蒋大为 | Hits:

[VHDL-FPGA-Verilog] FIFO

Description: VHDL源代码程序，使用VHDL语言编写，一个FIFO的代码实现工程-VHDL source code, the use of VHDL language, a FIFO realize the code works
Platform: | Size: 3072 | Author: 罗兰 | Hits:

[VHDL-FPGA-Verilog] FIFO

Description: FIFO的源代码，对FIFO设计有帮助，有借鉴意义，帮助学习VHDL编程-FIFO of the source code, on the FIFO design help, there is reference to help learn VHDL programming
Platform: | Size: 1024 | Author: 胡清泉 | Hits:

[VHDL-FPGA-Verilog] fifo-1117

Description: 这是异步FIFO的VHDL实现代码，已经在FPGA上通过实践证明，运行状态良好-This is the asynchronous FIFO realize the VHDL code, the FPGA has been proved through practice, running in good condition
Platform: | Size: 20480 | Author: 杨宇 | Hits:

[Linux-Unix] root-ipc-fifo-examples.tar

Description: UNIX/Linux环境下使用有名管道(FIFO)的例子。-UNIX/Linux environment using well-known pipe (FIFO) example.
Platform: | Size: 1024 | Author: root | Hits:

[VHDL-FPGA-Verilog] fifo

Description: 用双端口ram实现异步fifo，采用格雷码，避免产生毛刺。-Using dual-port ram realize asynchronous fifo, the use of Gray code, avoiding the production of burr.
Platform: | Size: 1024 | Author: shili | Hits:

[OS Develop] FIFO

Description: 通用异步FIFO设计的verilog代码，来自于opencore-Universal Asynchronous FIFO Verilog design code, from opencore
Platform: | Size: 18432 | Author: zhangjing | Hits:

[Graph Recognize] lcd-code

Description: 比较完整的LCD接口代码，verilog编写，分为6800和8080两种CPU接口，且有完整的仿真程序-Relatively complete LCD interface code, verilog prepared 6800 and 8080 is divided into two types of CPU interfaces, and there is a complete simulation program
Platform: | Size: 1831936 | Author: 李佳 | Hits:

[VHDL-FPGA-Verilog] Fifo

Description: 一个FIFO源代码，基于Altera FPGA-A FIFO source code, based on Altera FPGA
Platform: | Size: 1024 | Author: jiashengwen | Hits:

[VHDL-FPGA-Verilog] FIFO

Description: it is a verilog code written for FIFO in modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].you can use this code in any DSP project in which data entry is required.-it is a verilog code written for FIFO in modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].you can use this code in any DSP project in which data entry is required.
Platform: | Size: 31744 | Author: yasir ateeq | Hits:

[VHDL-FPGA-Verilog] fifo

Description: fifo 的vhdl源程序,容量为1024*8的fifo程序代码-fifo the vhdl source code,Capacity of 1024* the fifo code 8
Platform: | Size: 1024 | Author: 谢文华 | Hits:

[Other] fifo

Description: 同步fifo的原代码,给出了经典的同步fifo原代码，希望对大家有所帮助-synchronous fifo code
Platform: | Size: 2048 | Author: 画生 | Hits:

[VHDL-FPGA-Verilog] FIFO

Description: FIFO code in verilog
Platform: | Size: 1024 | Author: shahzadsaahil | Hits:
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